1. Field of Invention
The present invention relates to a driving method for a display apparatus. More particularly, the present invention relates to a low power driving method for an image display apparatus, which is capable of avoiding unusual display even if the gate driving capability is not sufficient.
2. Description of Related Art
As the growing display market currently, flat-panel display apparatus has gradually become the mainstream. There are various types of flat-panel display apparatus, for example, liquid crystal display (LCD) apparatus, plasma display panel (PDP) apparatus etc. The LCD apparatus has advantages of small size, low driving voltages, low power consumption, low radiation, and so on.
FIG. 1 is a simplified block diagram of a conventional TFT-LCD apparatus. Referring to FIG. 1, the TFT-LCD apparatus 100 at least includes: a power supply 101, a DC-DC voltage conversion circuit 102, a timing controller 103, a gate driving circuit 104, a source driving circuit 105, a display panel 106, and a backlight source 107.
The DC-DC voltage conversion circuit 102 converts the voltage provided by the power supply 101, and supplies the converted DC voltage to other circuits, for example, the timing controller 103, the gate driving circuit 104, and the source driving circuit 105.
The timing controller 103 transmits an input image data IN to the source driving circuit 105 according to timing sequences, and further transmits source clock signals HCLK, source start pulses signals STH, polarity indication signals POL, and other signals to the source driving circuit 105. Moreover, the timing controller 103 transmits gate start pulse signals STV, gate clock signals CPV, and output enable signals OE, and so on to the gate driving circuit 104.
The source driving circuit 105 stores the received data into a register in the source driving circuit 105. Furthermore, the source driving circuit 105 converts the data into an analog voltage signal, and outputs the analog voltage signal to the display panel 106 for driving the display panel 106.
The display panel 106 is coupled to the source driving circuit 105 and the gate driving circuit 104. The display panel 106 is driven by a plurality of source driving signals S_OUT output by the source driving circuit 105, and by a plurality of gate driving signals G_OUT output by the gate driving circuit 104, so as to display images.
The display panel 106 includes a plurality of sub-pixels arranged in an array. Each sub-pixel includes a TFT, a liquid crystal capacitor, and a storage capacitor. The TFT serves as a switch, to control the gray-scale for each sub-pixel. The gate driving circuit 104 sequentially scans each scan line, so as to turn on the TFTs in sequence. When TFTs on the same scan line are turned on, the source driving circuit 105 inputs the frame data into the sub-pixels, so as to display images. The gate driving signal G_OUT determines whether the TFTs on the same scan line are turned on or not.
When the output enable signal OE is at logic HIGH, the gate driving signal G_OUT is at logic LOW forcibly, so as to prevent the display data on two adjacent horizontal display lines from interfering with each other such that unusual display would be avoided. In the conventional art, timing diagram of the gate clock signal CPV, the output enable signal OE, and the gate driving signal G_OUT are shown in FIG. 2.
When the gate driving signal G_OUT is at logic HIGH (VGH), the corresponding scan line in the display panel 106 is turned on. On the contrary, when the gate driving signal G_OUT is at logic LOW (VGL), the corresponding scan line in the display panel 106 is turned off.
Here, for example, VGH is +18V (i.e +18 volts) and VGL is −6V (i.e. −6 volts). Since the voltage required for turning on/off the TFT is as high as 24V (i.e. +18V−(−6V)=24V), power consumption is large.
Furthermore, when the driving capability of the gate driving circuit 104 is insufficient, ON/OFF switches of the TFT may be abnormal or unsatisfactory, and thus causing frame aberration. Generally, the insufficient driving of the gate driving circuit 104 may be caused by various reasons: for example, (1) the power supplied by the power supply 101 is not enough or the power supply is unstable; (2) if the impedance for the signal line of the panel is excessively high, the gate driving voltage applied to far-end sub-pixels (those far from the gate driving circuit) is not high enough, such that the ON/OFF of the far-end sub-pixels will be affected, and thus causing the unusual display.
Therefore, a driving method for a display apparatus that is capable of saving power and avoiding unusual display caused by insufficient driving capability of the gate driving circuit is required.